Enable-IT 8424 Manual do Utilizador descarregar pdf (Página 12)

Hytec Electronics Ltd 8424TR/UTM/G/12/2.0

Page 12

5.2 Conversion Pointer

Read/write Address: 2hex

The current conversion address is given by the conversion address offset by the ADC number. This

Lower word 2hex

D15

D14

D13

D12

D11

D10

D09

D08

D07

D06

D05

D04

D03

D02

D01

D00

C15

C14

C13

C12

C11

C10

C9 C8 C7 C6 C5 C4 C3 C2 C1 C0

Upper word 4hex

D15

D14

D13

D12

D11

D10

D09

D08

D07

D06

D05

D04

D03

D02

D01

D00

x x x x x x x x x x x x x x C17

C16

5.3 ADC Sample Rate

Read/write Address: 6hex

The first five bits in the sample rate register are used to enables codes 0 – 18 to enable frequencies of 1

Hz to 1MHz in multiples of 1,2,5 or 10. (E.g. 0=1Hz, 1=2Hz, 2=5Hz, 3=10Hz and so on to 15=100KHz,

16=200KHz , 17=500KHz, 18=1MHz) Each clock pulse will initiate simultaneous ADC conversions and

store them in memory.

D15 D14 D13 D12 D11 D10 D09 D08 D07 D06 D05 D04 D03 D02 D01 D00

X15 X14 X13 X12 X11 X10 X9 X8 X7 X6 X5 S4 S3 S2 S1 S0

Clock rate Reg

(S4 to S0)

Frequency

Clock rate Reg

(S4 to S0)

Frequency

00000 1 01010 2KHz

00001 2 01011 5KHz

00010 5 01100 10KHz

00011 10 01101 20KHz

00100 20 01110 50KHz

00101 50 01111 100KHz

00110 100 10000 200KHz

00111 200 10001 500KHz

01000 500 10010 1MHz

01001 1KHz

1 2 ... 7 8 9 10 11 12 13 14 15 16 17 ... 30 31

Comentários a estes Manuais

Sem comentários

Enable-IT 8424 Manual do Utilizador Página 12

Comentários a estes Manuais